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Semiconductor device modeling creates models for the behavior of the electrical devices based on fundamental physics, such as the doping profiles of the devices. It may also include the creation of compact models (such as the well known SPICE transistor models), which try to capture the electrical behavior of such devices but do not generally derive them from the underlying physics. Normally it starts from the output of a semiconductor process simulation. == Introduction == The figure to the right provides a simplified conceptual view of “the big picture.” This figure shows two inverter stages and the resulting input-output voltage-time plot of the circuit. From the digital systems point of view the key parameters of interest are: timing delays, switching power, leakage current and cross-coupling (''crosstalk'') with other blocks. The voltage levels and transition speed are also of concern. The figure also shows schematically the importance of Ion versus Ioff, which in turn is related to drive-current (and mobility) for the “on” device and several leakage paths for the “off” devices. Not shown explicitly in the figure are the capacitances—both intrinsic and parasitic—that affect dynamic performance. The power scaling which is now a major driving force in the industry is reflected in the simplified equation shown in the figure — critical parameters are capacitance, power supply and clocking frequency. Key parameters that relate device behavior to system performance include the threshold voltage, driving current and subthreshold characteristics. It is the confluence of system performance issues with the underlying technology and device design variables that results in the ongoing scaling laws that we now codify as Moore’s law. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Semiconductor device modeling」の詳細全文を読む スポンサード リンク
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